TetraMem Completes MLX200 Silicon Validation. TetraMem, a pioneer in analog in-memory computing (IMC) technology, has successfully taped out and completed initial silicon validation of its MLX200, a multi-level RRAM-based analog in-memory computing system-on-chip (SoC). This marks a major commercial milestone for the company and for the broader field of AI hardware efficiency.
What Is the MLX200 and Why Does It Matter?
As AI workloads grow more demanding, the bottleneck is no longer just compute power — it’s data movement. Every time data travels between memory and processors, energy is consumed and latency is introduced. In-memory computing eliminates this bottleneck by performing calculations directly inside memory arrays.
The MLX200 is TetraMem‘s answer to this challenge. Built on TSMC’s 22nm process technology, the chip integrates multi-level Resistive RAM (RRAM) arrays with mixed-signal compute engines, enabling efficient, high-throughput vector-matrix multiplication directly within memory — the core operation underpinning neural network inference.
Key specifications and features include:
- Process node: 22nm TSMC fabrication
- Memory type: Multi-level RRAM arrays
- Compute paradigm: Analog in-memory computing (IMC)
- Core operation: Vector-matrix multiplication in memory
- Design approach: Mixed-signal compute engines for energy-efficient, low-latency inference
- Evaluation kits: Expected in H2 2026
Target Applications: Edge AI, IoT, Wearables, and Always-On Sensing
The MLX200 is engineered for deployment in power-constrained, latency-sensitive environments, making it well suited for:
- Wearable AI devices (smartwatches, health monitors, AR glasses)
- IoT edge nodes requiring local intelligence without cloud dependency
- Always-on sensing infrastructure such as environmental monitors and industrial sensors
- Low-power AI inference in embedded and mobile systems
For device makers targeting these markets, the MLX200 offers a path to running neural network workloads within strict power and thermal budgets — without sacrificing throughput.
Get Early Access: Evaluation Kits Coming H2 2026
With MLX200 silicon validation done, TetraMem is preparing to release MLX200 evaluation kits in the second half of 2026. These will enable hardware developers, AI system designers, and research teams to evaluate the chip’s performance for their specific applications.
If you’re designing next-generation edge AI hardware and want to learn more about MLX200 or request early access to an evaluation kit, contact the TetraMem team.
